8 research outputs found

    Tone Stimulus Detection in Rats Using RRAM-Based Local Field Potential Monitoring

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    The comprehension of brain activity presents signif-icant challenges in the field of neuroscience. Contrary to spikes, Local Field Potentials (LFPs) present improved stability acqui-sition in chronic implant scenarios and potential reductions in sampling and processing rates. While existing electrophysiology acquisition systems focus predominantly on spike detection and sorting, there is a lack of real-time tools for exploiting LFPs. To address this gap, we present a Resistive-RAM (RRAM) based approach to process LFP traces. Our method follows an improved Memristive Integrating Sensor (MIS) protocol to effectively detect LFP events recorded from the deep-brain of an awake rat, while externally stimulated by a tone. Experimental results demonstrate the feasibility of real-time neural activity processing, offering insights into detecting meaningful external stimuli and facilitating efficient neural state estimation

    A memristor fingerprinting and characterisation methodology for hardware security

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    Abstract The modern IC supply chain encompasses a large number of steps and manufacturers. In many applications it is critically important that chips are of the right quality and are assured to have been obtained from the legitimate supply chain. To this end, it is necessary to be able to uniquely identify systems to aid in supply chain tracking and quality assurance. Many identifiers, however, can be cloned onto counterfeit devices and are therefore untrustworthy. This paper proposes a methodology for using post-CMOS memristor devices as a fingerprint to uniquely identify ICs. To achieve this, memristors’ unique and variable I–V characteristics are exploited to produce a fingerprint that can be generally applicable to a wide variety of different memristor technologies and identifiable over time, even where cell retention is non-ideal. In doing so it aims to minimise the hardware required on-chip both to minimise cost and maximise the auditability of the system. The methodology is applied to a TiOx\text {TiO}_x TiO x memristor technology, and shown to be able to identify cells in a set

    A PUF Based on the Non-Linearity of Memristors

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    As autonomous devices are increasingly used in security and safety-critical applications the security of the systems they comprise is of increasing concern. In such situations it is important that devices can be securely identified and trusted. When an IC or device is in the supply chain, or in the field, the lack of control over actors who can obtain physical access can compromise the trust and overall security of a system. Counterfeit chips may be incorporated into the device, compromising reliability or security. Additionally, for implemented devices, keys stored on-device may be copied by a bad actor. To help improve the security of such devices this paper proposes a new physical unclonable function (PUF) architecture, based on a TiOx memristor-based resistive memory (RRAM), that exploits the inherent analogue non-linearity in resistance of some memristor technologies. By directly exploiting non-linearity of memristor cells, rather than relying on the devices' absolute resistance at a single test voltage, a multi-bit-per-comparison PUF is created. As the architecture directly exploits cells' non-linearity, an additional source of hard-to-clone entropy is incorporated

    An FPGA based system for interfacing with crossbar arrays

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    Memristor crossbar arrays offer a novel new approach for designing high density non-volatile memory; however, precise measurement of resistive crossbar elements requires parallel current sensing capability not found in existing instruments. To provide this capability, we have designed and built an FPGA-based crossbar control instrument with independent per-channel biasing and measuring. In this paper, we cover the architecture of this new instrument, its operation and interface, and the results of testing conducted on the instruments pulse driver circuitry
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